Low Voltage Bicmos Tspc Latch for High Performance Digital Systems
نویسندگان
چکیده
New true single-phase clock (TSPC) BiCMOS circuits are described. The TSPC latches are intended for use in highperformance deeply pipelined digital electronic systems. The circuits described are based on quasi-complementary BiCMOS circuit using single-phase clock. They are verified to have fullswing operation with supply voltages as low as 1.5V. The speed and power performance of the new latch is superior to previously published results, which was confirmed by simulation in 0.5μm technology.
منابع مشابه
A New True-Single-Phase-Clocking BiCMOS Dynamic Pipelined Logic Family for High-Speed, Low-Voltage P - Solid-State Circuits, IEEE Journal of
New true-single-phase-clocking (TSPC) BiCMOS/ BiNMOS/BiPMOS dynamic logic circuits and BiCMOS/BiNMOS dynamic latch logic circuits for high-speed dynamic pipelined system applications are proposed and analyzed. In the proposed circuits, the bootstrapping technique is utilized to achieve fast near-full-swing operation. The circuit performance of the proposed new dynamic logic circuits and dynamic...
متن کاملA Single-phase Clock High-performance Bicmos Latch
A true single-phase clock BiCMOS latch intended for the use in high-performance deeply pipelined digital systems is proposed. It is based on quasi-complementary BiCMOS circuit, and uses single-phase clock. The speed and power performance of this latch are superior to previously published results, which has been shown by simulation in 0.8μm technology.
متن کاملHigh Speed Full Swing Current Mode BiCMOS Logical Operators
In this paper the design of a new high-speed current mode BiCMOS logic circuits isproposed. By altering the threshold detector circuit of the conventional current mode logic circuitsand applying the multiple value logic (MVL) approach the number of transistors in basic logicoperators are significantly reduced and hence a reduction of chip area and power dissipation as wellas an increase in spee...
متن کاملDesign Techniques for High-speed, High-Resolution Comparators
This paper describes precision techniques for the design of comparators used in high-performance analog-to-digita1 converters employing parallel conversion stages. Following a review of conventional offset cancellation techniques, circuit designs achieving 12-b resolution in both BiCMOS and CMOS 5-V technologies are presented. The BiCMOS comparator consists of a preamplifier followed by two reg...
متن کاملEnhanced Low Power Pulsed Triggered Flip-Flop Design Based on Signal Feed Through Scheme With Voltage Scaling
Pulse-triggered FF (P-FF), because of its singlelatch structure, is more popular than the conventional transmission gate (TG) and master–slave based FFs in high-speed applications. Besides the speed advantage, its circuit simplicity lowers the power consumption of the clock tree system. In this project a novel P-FF design by employing a modified TSPC latch structure incorporating a mixed design...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 1998